A common overlooked issue: when we are immersed in financial data and market expectations, we often ignore the fundamental laws of the physical world. The chip industry is entering a critical turning point—the end of Moore's Law planar scaling.

The reality is harsh. The era of simply shrinking transistor sizes to improve performance and density has essentially ended. Capacity expansion has hit physical limits. This is not a problem that capital can solve, but a constraint of physics.

So where is the breakthrough? Vertical stacking. This is now the industry’s widely recognized only solution. The development of 3D NAND storage chips is the best example—by vertically stacking layers of crystals, it achieves exponential increases in capacity within the same chip area. This not only bypasses the dead end of planar scaling but also opens up entirely new possibilities for capacity expansion.

The key is that this capacity release requires time, process validation, and cost investment. Whether the industry can transition smoothly will directly impact the entire supply chain and price expectations.